Service

Committee Member, USENIX ATC

2021

Committee Member, ICLR

2021

Committee Member, MLSys

2021

Committee Member, OOPSLA

2021

Committee Member, NeurlPS

2020

Steering committee chair, MAPL

2020

Committee Member, JPDC

2020

Committee Member, aiDM

2020

Committee Member, TheWebConf

2020

Committee Member, MLSys

2020

Student Research Competition Committee, PACT

2019

Program committee member, SysML

2019

General chair, ACM SIGPLAN MAPL Workshop

2018

Program chair, ACM SIGPLAN MAPL Workshop

2017

Steering committee and co-founder, Machine Learning and Programming Languages (MAPL)

2017

NSF Panel member

2016

Reviewer, High-Performance Computer Architecture (HPCA)

2014

Reviewer, Journal of the ACM (JACM)

2014

Steering committee, TRANSACT

2014-present

General chair, TRANSACT

2014

Program chair, TRANSACT

2013

External reviewer, International Symposium on Distributed Computing (DISC)

2013

Town hall moderator: Language-Level Standards for Transactional Memory (TRANSACT)

2013

External reviewer, Architecture Support for Programming Languages and Operating Systems (ASPLOS)

2013

Application track chair, TRANSACT

2013

Vice-chair, Standard C++’s Study Group (SG5: Transactional Memory)

2012

Chair, Draft Specification for Transactional Memory Constructs in C++

2012

Program committee member, TRANSACT

2012

External reviewer, Architecture Support for Programming Languages and Operating Systems (ASPLOS)

2012

Editor, Draft Specification for Transactional Memory Constructs in C++

2011-2012

Committee member, Draft Specification for Transactional Memory Constructs in C++

2010-2011

Program committee member, BoostCon

2010-2011

External reviewer, International Conference on Runtime Verification (RV)

2011

External reviewer, International Workshop on Languages and Compilers for Parallel Computing (LCPC)

2011

External reviewer, International Conference on Network and Parallel Computing (NPC)

2011

External reviewer, Symposium on Parallelism in Algorithms and Architectures (SPAA)

2011

External reviewer, European Symposium on Programming (ESOP)

2011

External reviewer, Journal of Parallel and Distributed Computing (JPDC)

2010

Moderator / chair, Transactional Memory Workshop, BoostCon

2010

Moderator / chair, High-Performance Computing Track, Raytheon ISaC Conference

2010

External reviewer, Symposium on Code Generation and Optimization (CGO)

2008

External reviewer, Journal of Parallel and Distributed Computing (JPDC)

2008

External reviewer, Symposium on Computer Architecture (ISCA)

2008